Action Items from March 2009 FPHX Review

• Look at large pulse recovery (Tom had tested already)
• Look at sensitivity to power supply voltage - DONE, some sensitivity to A_D
• Should complete tests using internal pulser (FNAL tested but we did not)
• Should try running at real PHENIX beam clock (9.4 MHz as opposed to 10.0 MHz) DONE, No issues seen with calibration data
• Should vary cable lengths carrying LVDS - DONE, no issues with +2m
• Measure sensitivity to phase relation between beam clock and read clock - DONE, No issues seen with calibration data
• Check the reset timing requirements in more detail: we know we have to issue reset on proper edge; how much out of phase can we be and it still works? - DONE, Reset works fine up to 15 ns out of phase
• Check performance of chip when data output is active DONE, No issues seen with calibration data when very noisy channel is unmasked at the same time
• Try some longer burn-in tests many hours or days - DONE, good BCO, data stability seen with over-night pulser run